[extropy-chat] diffraction limit

[Dan Clemmensen]

Brent Neal wrote:

> (5/31/04 10:48) Dan Clemmensen <dgc at cox.net> wrote:
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>>The paper we are discussing examines density limits imposed by the 
>>Heisenberg uncertainty principle on classical electronics, and is 
>>independent of materials. These limits therefore will apply to molecular 
>>transistors and all other nano-electronics.  I think they also apply to 
>>spintronics. They do not apply to nanomechanical computing.
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>The problem is that even at this point, we're a lot closer to being able to commercialize spintronics and even quantum computing than we are nanomechanical computing.
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I don't know much about spintronics, but in one aspect it appears to 
enable quantum computing. In another aspect is appears to permit each 
electron in a flow to carry a bit.   My gut feeling is that electron 
spin is even more uncertain (in the Heisenberg sense) than electron 
position, but I'm willing to be educated on this. If my intuition is 
correct, spintronics will cannot be scaled smaller than electronics., 
because electron spins will merge when the electrons get too close to 
each other. If this is correct, electronics will win, because it is 
easier to simply keep improving electronics than it is to shift to 
spintronics.

Quantum computing (with or without spintronics) allows for fast parallel 
processing for a certain class of algorithms. AFAIK it is not a general 
substitute for binary computation. This means that it cannot substitute 
for electronics in most cases, and that a large new software 
infrastructure will be required. Contrary to popular belief, software 
design effort generally overwhelms hardware design effort at  the system 
level. I doubt that quantum computing will have much impact except in 
specialty areas before we reach the CMOS density limit.

Nanomechanical or naonelectronic hardware will require entirely new 
device technologies, but the resulting devices can be treated as 
straightforward direct replacements for the last CMOS generation. They 
are therefore much easier than Spintronic and Quantum computing elements 
to actually build into systems.

>>Note that nanoelectronics is likely to be unrelated to photolithography. 
>>I really hope it can be implemented without the enormous capital costs 
>>associated with today's silicon Fabs.
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>My intuition is that any commerically viable method of nanoelectronics will necessarily start with patterned deposition and move quickly to self-assembly as we get a handle on the chemistry that is involved there.[...] I would start out assuming that the first generation of nanoelectronics fabrication facilities will be no less expensive than the traditional CMOS fabs at the time that nanoelectronics go to market. Anything else would be wishful thinking. The hope would be that the rate constant on cost growth for nanoelectronics would be significantly smaller than for CMOS at that time.
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I do not understand your intuition, here. The current technology is  
economical only for very high volume parts. It may be possible to 
introduce a new technology that is competitive for low -volume devices, 
using some alternative techniques. These may not need the whole capital 
infrastructure of the photolithography industry, even if it bootstraps 
using patterned deposition. Look as Affymetrix, not Intel.